11: FPGA (DPL) - Push button & LED

In this tutorial, we are going to use the FPGA to control external LED circuit. We are going to implement the following tasks

(A) Use the push buttons on FPGA Cyclone IV DuePrologic to control LED.
(B) Flash LED on & off periodically

Step 1: Build electronic circuit

Step 2: Check the pin planner and edit Verilog code

When you buy FPGA DueProLogic, you should receive a DVD. After you open "Projects_HDL", you should see the original code file

Add the Verilog code highlighted in yellow color . It registers the I/O ports and assign numbers to the ports.

output wire   [7:0]        XIO_1,       //XIO -- D2-D9
output wire   [5:0]        XIO_2,       //XIO -- D10-D12
output wire   [5:0]        XIO_3,       //XIO -- D22-D29
input wire    [5:0]        XIO_4,       //XIO -- D30-D37
input wire    [5:0]        XIO_5,       //XIO -- D38-D45
output wire   [4:0]        XIO_6_OUT,   //XIO -- D46-D53
input wire    [31:5]       XIO_6,       //XIO -- D46-D53
output wire   [2:0]        XIO_7,       //XIO -- D69,D70,D71,D74,D75,D76
//Push Button Switches
input wire                UBA,
input wire                UBB


assign            XIO_1[3] = start_stop_cntrl;             
assign            XIO_2[1] = start_blinky;  //LED flash LED on and off 
assign            XIO_2[2] = 1'b1;  //output HIGH
assign            XIO_2[3] = ~UBA;  //Push button A
assign            XIO_2[4] = UBB;  //Push button B
assign            c_enable = XIO_5[2];          
assign            LEDExt = XIO_5[5];    



Then we have to set a delay timer. Comment the original timer and write a new timer function which is marked by yellow color. 

   //-----------------------------------------------
   // LED Blinky start 
   //-----------------------------------------------
/*  always @(posedge CLK_66 or negedge RST)
  begin
    if(!RST)
         start_blinky <= 1'b0;
else 
begin
    if(control_register[7:4] > 0)
            start_blinky <= 1'b1;
else
            start_blinky <= 1'b0;
  end 
  end
 */
 reg [31:0] ex;
 initial begin
ex <= 32'b0;
start_blinky <= 1'b0;
 end

  always @(posedge CLK_66)
  begin
    ex <= ex + 1'b1;
    if(ex > 100000000)  //flash on/off ~1.6 seconds , clock 66MHz
begin
         start_blinky <= !start_blinky;//1'b1;
 ex <= 32'b0;
end  
  end
   //-----------------------------------------------
   // LED Delay Timer Counter 
   //-----------------------------------------------
/*  always @(posedge CLK_66 or negedge RST)
  begin
    if(!RST)
     led_delay_counter <= TIMER_LOW_LIMIT;
else 
begin
     if(state[SELECT_MODE])
led_delay_counter <= timer_value;
else if(state[WAIT_FOR_TIMER])
         led_delay_counter <= led_delay_counter - 1'd1;
end 
  end

*/

Step 3: Compile verilog code

Press "Start Compilation" in Quartus, no error message should be generated. If you receive error message about multiple pins. Go to Assignments -> Device -> Device and Pin Options -> Dual-Purpose Pins -> change the value of the appropriate pin to "Use as regular I/O".

After compilation, you should get pof output file directly. If your software is not up-to-date, you may get sof file only. When it happens, click "File" in Quartus -> "convert programming files". Change the settings which are marked by red boxes.

Step 4: Upload Verilog code

Press "Programmer" in Quartus, update the generated pof file and then click "Start". If no hardware is detected automatically, click "Hardware Setup" manually

After all, it should work!!! The yellow LED is always on. The red LED is flashing. The blue LED is turned off if you press button B. The green LED is turned on if you press button A

Video Demo